Vicor who will be participating in next months Forums will be presenting on the following subject during the AM technical presentations, you can come and meet with Vicor and hear this presentation at:

October 15th – Moller Centre – Cambridge – Register for Cambridge October 15th – CLICK HERE

October 20th – Williams F1 HQ – Oxford – Register for Oxford October 20th – CLICK HERE

This presentation will explore the Zero Voltage Switching (ZVS) Buck topology; explaining the purpose of the clamp switch and how ZVS uses parasitic circuit elements, that are a nuisance in traditional PWM designs, as an integral part of its operation.  A comparison between the ZVS and traditional PWM switching waveforms will be presented.

The ZVS design addresses the high turn-on losses of the conventional regulator by eliminating high current, body diode conduction prior to turn-on of the high-side MOSFET, bringing the Drain-Source voltage to zero or nearly zero, thus eradicating high current spikes and damaging ringing.  The ZVS action applied to upper MOSFET removes its Miller effect at turn-on, reducing the need for high current gate drivers.

By virtually eliminating switching losses, the ZVS has much better efficiency and can handle more current and at higher ambient temperatures before de-rating than any other integrated FET buck converter IC.  As the input voltage gets higher, the advantages of ZVS become even more pronounced in terms of efficiency as well as MOSFET reliability.

Useful additional features, such as parallel operation with single wire current sharing, interleaving to reduce EMI and constant current output for applications such as LED lighting and battery charging will be summarised.